Principal Software Engineer | Cadence Design Systems | Noida, Uttar Pradesh, India

Position: Principal Software Engineer

Location: Noida, Uttar Pradesh, India

Job Description

Qualification and Skills

• BS / MS in Computer Science or equivalent required.
• At least 5 years of software and product development experience.
• Proficient in C/C++ SW development using advanced data-structures and algorithms and heuristics along with excellent and debugging skill
• Prior experience and understanding of EDA front-end tools and compiler concepts like parsing elaboration of HDL is desirable.
• Experience or understanding of System Verilog or VHDL language constructs and RTL Simulation concepts with be preferred
• Hardware knowledge and background in RTL design and/or verification is highly desirable.
• Additional knowledge of shell or Perl or TCL scripting, python, and functional programming will be preferred.
• Good problem-solving abilities and excellent writing and communication skills.
• Keywords – Data Structures, Algorithms, C/C++, Data Structures, System Verilog, VHDL, RTL, Simulation, Compilers, UVM, TLM, RTL modeling, emulation.

Responsibilities

• We are looking for a motivated R&D engineer to help develop Cadence’s Verification Acceleration and Co-Emulation environment.
• The engineer will be a part of cross geography team in developing maintainable, high-quality C/C++ code for a HDL language based compiler and runtime support.
• It include development of HDL compiler front-end for SV, VHDL LRM support, improving compiler performance and infrastructure. Exposure to RTL simulation/synthesis and runtime environment is highly desirable.

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